1. Field of the Invention
The present invention relates to the forming, in a monolithic circuit, of an inductance with a midpoint. The present invention more specifically relates to the forming of a symmetrical inductance. An inductance with a midpoint is formed of a conductive winding, the two ends of which form two terminals of the inductance. A third terminal, also called the midpoint, provides access to another point of the conductive section. In the case of a symmetrical inductance, the midpoint is equally distant from the two end terminals of the conductive section.
2. Discussion of the Related Art
Symmetrical inductances with midpoints are generally used in differential assemblies using outputs in phase opposition. This type of inductance can be found in high-frequency or radio frequency circuits and, more generally, in any differential or balanced circuit requiring accuracy in the symmetry between two inductive elements. For example, this type of inductance may be used in voltage-controlled oscillators (VCO), in phase-locked loops (PLL), in low-noise differential amplifiers (LNA), etc. In this type of application, it is necessary to have a structure as symmetrical as possible to avoid any imbalance or distortion in the circuit exploiting the inductance. This symmetry requires determining, searching, as seen from the internal connection of the winding (midpoint), a path which is identical going to one or the other of the end terminals of the winding. A symmetrical structure also results in a symmetrical electric model which enables avoiding any connection difficulty related to the flow direction of the current.
FIG. 1 shows, in a simplified top view, a conventional structure of a symmetrical inductance with a midpoint, for example of generally octagonal shape. The inductance comprises a first spiral 1 formed in a first metallization level. Spiral 1 connects a first d 4 to midpoint 2 of the inductance. Spiral 1 is cut into several sections 11, 12, interconnected by a connection 13 on a second metallization level via vias 14 between the first and second levels. A second spiral 3 is formed in the same metallization level as the first one. Spiral 3 connects midpoint 2 to a second end terminal 5. Spiral 3 is formed, here again, of sections 31 and 32 interconnected by a connection 33 in another metallization level (the same as that having enabled the forming of connections 13) via vias 34. Connections 13 and 33 provide a regular crossed arrangement of the different sections of the complete winding, resulting in a totally symmetrical structure in which all currents flow in the same direction. Midpoint 2 of the inductance is connected, by a connection 21 in a third metallization level, to the outside of the winding for connection to the other components of the monolithic circuit (not shown). A via 22 connects connection 21 to point 2 in the first conductive level.
A disadvantage of known symmetrical inductance structures with a midpoint is linked to the presence of multiple vias, the number of which increases as the number of turns of the coil of the inductance increases. Indeed, the example of FIG. 1 shows an inductance with three turns of the coil (one turn of the coil and a half for each conductive spiral taken from an end 4 or 5 to midpoint 2) already requiring four vias for the simple crossing of the spiral sections (without taking into account via 22 of connection of midpoint 2 to the outside of the structure). An inductance with five turns of the coil according to such a structure requires eight vias.
A first disadvantage of vias is that they form resistive elements that increase the series resistance of the winding. This adversely affects high-frequency operations for which inductances formed in a monolithic circuit are generally intended.
The problem of the series resistance introduced by the vias implies that, in practice, the maximum number of turns of the coil is generally of five turns of coil (eight vias for the sole conductive circuit sections).
A second disadvantage is the very size of the vias which conditions the minimum dimensions of the inductive structure. In particular, the necessary diameter of the vias imposes a minimum track width (and accordingly a step between tracks) which is greater than the via dimension.
This dimension problem conventionally makes the forming of symmetrical inductive structures with a midpoint almost impossible in integrated circuits for which a thick dielectric (on the order of from 5 to 10 μm) with a low electric permittivity enabling significant reduction of stray capacitances and of coupling phenomena between metallizations, necessary to this type of application, is used. The fact that the dielectric is thick makes the forming of openings (and thus of vias) therein more difficult. For example, for a dielectric of a thickness on the order of 10 μm, the diameter necessary for the via opening is of 50 μm, which imposes a significant track width, generally incompatible with an integration of the circuit in a reduced surface area.